JPH0113655B2 - - Google Patents

Info

Publication number
JPH0113655B2
JPH0113655B2 JP54009996A JP999679A JPH0113655B2 JP H0113655 B2 JPH0113655 B2 JP H0113655B2 JP 54009996 A JP54009996 A JP 54009996A JP 999679 A JP999679 A JP 999679A JP H0113655 B2 JPH0113655 B2 JP H0113655B2
Authority
JP
Japan
Prior art keywords
flip
input
output
flop
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54009996A
Other languages
English (en)
Japanese (ja)
Other versions
JPS55102927A (en
Inventor
Toshiaki Nozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP999679A priority Critical patent/JPS55102927A/ja
Publication of JPS55102927A publication Critical patent/JPS55102927A/ja
Publication of JPH0113655B2 publication Critical patent/JPH0113655B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125Discriminating pulses
    • H03K5/1252Suppression or limitation of noise or interference
    • H03K5/1254Suppression or limitation of noise or interference specially adapted for pulses generated by closure of switches, i.e. anti-bouncing devices

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Dc Digital Transmission (AREA)
JP999679A 1979-01-31 1979-01-31 Chattering removal circuit Granted JPS55102927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP999679A JPS55102927A (en) 1979-01-31 1979-01-31 Chattering removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP999679A JPS55102927A (en) 1979-01-31 1979-01-31 Chattering removal circuit

Publications (2)

Publication Number Publication Date
JPS55102927A JPS55102927A (en) 1980-08-06
JPH0113655B2 true JPH0113655B2 (en]) 1989-03-07

Family

ID=11735455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP999679A Granted JPS55102927A (en) 1979-01-31 1979-01-31 Chattering removal circuit

Country Status (1)

Country Link
JP (1) JPS55102927A (en])

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0763146B2 (ja) * 1983-07-12 1995-07-05 セイコーエプソン株式会社 スタンバイ回路
IT1243301B (it) * 1990-05-25 1994-05-26 Sgs Thomson Microelectronics Circuito di filtraggio di un segnale logico affetto da spikes di commutazione

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4928206A (en]) * 1972-07-08 1974-03-13
JPS5169974A (ja) * 1974-12-16 1976-06-17 Oki Electric Ind Co Ltd Kikankeiritokuseigyokairo
JPS5733653Y2 (en]) * 1976-08-20 1982-07-24

Also Published As

Publication number Publication date
JPS55102927A (en) 1980-08-06

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